AINEWS
Wider memory buses are pushing into the space fans and heat pipes have used for decades. Apple sidesteps the fight with on package memory; everyone else is betting on solid state cooling.
Picture a thin laptop in cross-section. The processor sits on one side, the memory chips on the other, and the narrow corridor between them, previously home to fans and heat pipes, is now the place where wider memory buses have to live. That is the spatial puzzle every thin AI laptop is about to hit, and the reason Apple puts memory directly on the M5 Max's chip package.
Speed, measured in tokens per second, scales mostly with memory bandwidth: bus width times capacity times speed. A 128-bit LPDDR5 bus, the kind most laptops still ship with, caps bandwidth around 150 GB per second. Wider buses are arriving: Qualcomm's Snapdragon X2 Elite at 192 bits, AMD and NVIDIA at 256 bits in client silicon, Apple's M5 Max at 512 bits, according to a Ventiva-sponsored white paper co-developed with Moor Insights & Strategy. The same paper reports the M5 Max can run a 120-billion-parameter open-weight model, GPT-OSS 120B, entirely on device, an inference workload the paper links to the wider bus.
Wider buses are not free. They force memory chips to sit within traces shorter than 25 millimeters of the processor, the same real estate fans and heat pipes have occupied for decades. Apple sidesteps the fight by placing memory directly on the chip package. Everyone else has to solve the collision inside a traditional chassis. That is what solid-state cooling is built to fix.
Three fanless approaches are competing for that corridor. Ventiva's ionic cooling moves charged particles instead of air, with no moving parts. Frore's AirJet, also no moving parts, sustained 15 watts of cooling in an 11.3 mm Intel reference laptop. YPlasma's plasma cooler, shown at CES, claims operation at 17 decibels, roughly the noise floor of a quiet library. None of these are shipping in volume; they are reference designs and single-OEM concept builds, not consumer products. The available performance numbers come from the vendors or the white paper ecosystem that frames them, not independent measurement. If any of the three scales, buyers get quieter machines, thinner chassis, and dust-resistant systems that do not need vents cut into the case.
The scale limits are concrete. In a PCWorld interview, Ventiva CEO Carl Schlachte said the company's ICE strips roughly 25 watts from an Intel Core Ultra 200 (Lunar Lake) chip, the largest ICE moves about 1 CFM, and a single-source supplier constrains deployments to one or two models per OEM. The target is premium notebooks above $1,000, with Intel Evo consideration underway. A separate Ventiva press release confirmed ICE9 appeared in a Dell concept laptop under 12 mm with Intel Lunar Lake, but no formal OEM commitment has been announced. The company is based in Fremont, California, founded in 2008, and began large-scale shipments through manufacturing partner Crystal Precision in 2025. The $1,000+ price floor means the fanless bet reaches flagship laptops first, leaving mass-market notebooks on whatever chassis compromise the wider bus demands.
The pressure on those square centimeters is not letting up. LPDDR6, the next generation of low-power laptop memory after LPDDR5, is forecast for mainstream adoption in 2027 and 2028, with faster data rates and better power efficiency. The trade-press framing of solid-state cooling as "the secret to faster AI laptops" leans on that same single Ventiva-sponsored white paper. The forecast and the framing are worth weighting against the source.
LPDDR6's 2027-2028 mainstream adoption window is the deadline. Apple's on-package memory buys time; the rest of the industry is racing the same square centimeters with a fanless bet.