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Three Companies Make the Memory Powering Most AI Chips. A New Primer Explains Why That Matters
High bandwidth memory sits inside nearly every leading AI accelerator, and fabrication is concentrated in a handful of East Asian facilities.
High bandwidth memory sits inside nearly every leading AI accelerator, and fabrication is concentrated in a handful of East Asian facilities.
A single category of specialized memory sits inside nearly every AI accelerator shipping today. That memory, called high-bandwidth memory or HBM, is the layer that feeds the math engines that make modern AI work, and only three companies in the world produce it at globally competitive scale.
HBM is built by stacking many DRAM chips on top of a thin base logic die, then wiring them together through thousands of vertical electrical connections called through-silicon vias. That three-dimensional structure shortens the data paths relative to conventional memory layouts and lets AI accelerators move large blocks of data to their arithmetic units at speeds ordinary memory cannot reach. Without HBM bandwidth, the most powerful AI chips on the market stall waiting for data. The engineering is well understood; the strategic question is who can build it.
Production is concentrated in a small number of facilities in East Asia, according to a new RAND perspective, "High Bandwidth Memory: What It Is and Why It Matters," published today (PDF). The RAND Corporation, a U.S. research organization, released the 20-page primer to give policymakers and researchers a single working map of the HBM ecosystem: what HBM is, how the chips are stacked and packaged, and who controls production. The paper is positioned as a reference document that policy and industry conversations can cite, rather than as a position paper.
HBM occupies a layer most AI coverage never names. It sits below the GPUs and custom AI accelerators that headline model launches, and below the foundry competition that draws the most policy attention. The memory itself has become a recurring story in AI trade coverage, where HBM capacity is described as the leading supply bottleneck for AI systems. If a small number of East Asian fabrication sites experienced disruption, the consequences would propagate upward into model releases, GPU allocations, and hyperscaler buildouts that define the current AI buildout.
The primer leaves the policy prescriptions to its readers. Its job is structural: to make an invisible layer of the AI stack legible so the next time a news story refers to "HBM supply" or "memory bottlenecks," readers have a working mental model of what is being constrained, by whom, and where. General technical background on high-bandwidth memory has existed for years in encyclopedia and trade-press form; the RAND document's contribution is to assemble the technical and market pictures in one place and to give the concentration fact a sober, citable framing.