SIGNALprophet format
The memory cycle is being argued in the wrong unit. The wire counts bits; the fabs count wafers. The gap between those two ledgers is the number every bear call has been missing.
Call it the Stack Tax. Every generation of stacked DRAM pays a silicon-area penalty — through-silicon vias, ultra-wide I/Os, stacking yield — before a single usable bit is fabricated. @AnalysisOp's read of the die math shows the bill: HBM dies run 35–45% larger than equal-capacity DDR5 dies, so the same number of good HBM3E bits costs roughly 2.7x the effective DRAM wafer capacity, and the multiplier climbs to ~4x for HBM4E. That is not a forecast — it is geometry.
The bears' standard model watches the bit-supply line and waits for the glut. The Stack Tax says the bit-supply line is the wrong ledger. Even a clean execution ramp leaves wafer demand pulling forward faster than headline capacity, because every HBM bit eats several DDR5 bits' worth of fab. The next earnings round will print "better than expected" on supply and tighter than expected on wafer allocation — the same cycle, two ledgers.
SK hynix CEO Kwak Noh-jung called 2027 the most severe supply shortage on record the same week the company priced a $26.5B Nasdaq ADR. The bears' case is real — prior HBM forecasts overshot, hyperscalers are building in-house silicon, China demand is a swing factor, 2030 is far. But the bear model has to absorb the Stack Tax, or it is forecasting the wrong curve.