Indium phosphide is the substrate used in the optical links between AI server chips. As next generation 1.6T (terabit per second) optical upgrades and a China export control tail strain supply, it is becoming a strategic chokepoint.
The compound-semiconductor substrate that turns electrical signals into the laser light used to move data between AI server chips is becoming a strategic chokepoint. Indium phosphide, a wafer material that until recently sat deep in the optical-components supply chain, is now caught at the intersection of a generational upgrade cycle inside AI data centers and a narrow, geopolitically exposed supply base.
The demand side is moving on a curve most industry observers describe as physics-driven. Today's AI clusters ship optical links running at 800G per module, with pluggable transceivers and external lasers doing most of the work. The next generation, 1.6T modules and co-packaged optics that mount the optical engine next to the switch ASIC, pushes the integration problem onto the laser and the substrate it sits on. Digitimes reported in May that the 800G-to-1.6T transition reads as a physics-driven inflection rather than a routine upgrade, and the trade press lead in July named high-power continuous-wave lasers and InP substrates as the two layers where the supply chain is being asked to deliver higher power and tighter integration at the same time.
IntelliEPI (ticker IET-KY), an InP wafer maker tracked across the secondary trade press, reported first-quarter 2026 revenue of NT$332 million, a quarterly record, with company commentary naming the InP substrate shortage as the largest single bottleneck. At roughly 31.5 New Taiwan dollars to the US dollar in mid-2026, NT$332 million works out to about US$10.5 million. The figure is small relative to a chip-industry giant, but the growth rate and the constraint it reflects are what matter. The same earnings cycle was flagged by Digitimes in late 2025 when IntelliEPI began restructuring to align capacity with a substrate shortage the trade press had been tracking for months.
The Mordor Intelligence industry report treats InP wafers as their own market segment, but actual merchant production is concentrated in a small number of Western and Taiwanese suppliers, with Japan and the United States holding most of the leading-edge capacity. That concentration is what a June 2026 Reuters report made newly visible: China controls some indium phosphide base-material exports, in the same family of compound-semiconductor materials as gallium and germanium, a factor that industry sources track for implications for AI data center buildout timelines. Taiwan-based compound-semiconductor suppliers are positioned in the moomoo community discussion as potential beneficiaries of any non-China re-routing, though capacity additions take years rather than quarters, and announced timelines have a habit of slipping.
Two counter-pressures belong in the picture. Silicon photonics remains the most discussed alternative path, with the silicon substrate doing more of the optical work and the InP layer shrinking to a laser diode or a bonding interface. Pluggable optics, the dominant 800G architecture today, can stretch to higher lane rates before co-packaged optics becomes the only option. Neither path removes InP entirely, but both can pull on the demand curve. Storm.mg's coverage of the substrate question carries the same caution: the demand projections depend on which optical architecture wins, and the vendors pushing CPO timelines have an interest in those projections landing high.
What to watch over the next two quarters: IntelliEPI's next earnings call for whether the record quarter extends or reflects one-time pull-ins; capacity announcements from non-China merchant InP wafer suppliers; whether Chinese export controls are expanded beyond base indium phosphide materials to cover finished InP wafers; and the first 1.6T CPO reference designs from the major switch ASIC vendors, since those designs will set the laser power and substrate area per port that the supply chain has to fund.
The reason to walk through the layers is that the bottleneck migrates. GPUs were the named constraint through 2024 and into 2025. HBM memory and advanced packaging have been the named constraint through 2026. The next named constraint, on current evidence, is the optical layer that connects those chips, and the substrate underneath that layer is where the next round of supply-chain reshuffling is being forced.