Megakernels fuse every operation of an AI's serving pass — the work of answering one prompt — into one GPU program, the most ambitious version of an inference speedup. Research labs love them. Almost no production team ships them.
Sixty-seven thousand lines of hand-fused GPU code, written to collapse every operation of a model's serving pass into one launchable program, is the kind of artifact that earns a research paper. It's not, in 2026, the kind of artifact that ships behind a chatbot. The gap between those two facts is the megakernel debate.
The trick underneath is kernel fusion. Every time a model answers a prompt, the GPU program fires thousands of small operations, each one a separately launched kernel, and launching one costs microseconds that add up across a serving pass. A megakernel fuses hundreds or thousands of those kernels into one giant program to amortize the launch cost and tighten the overlap between steps. Cursor's open-source cursor-mok repo and the benchmark writeup it ships with are the cleanest public example. The repo reads as a frontier-ML research artifact, not a serving codebase.
The argument for fusing harder has a hard ceiling in production. "No serious inference provider is running a 67k-loc hand-fused forward-pass kernel in production," an engineer identified as Ali told the Latent Space Inference Engineering Masterclass, a curatorial discussion of recorded practitioner talks. The reason isn't raw performance. It's engineering: a 67,000-line fused program is hard to optimize, hard to debug, and brittle against model changes, and it loses to composed stacks like NVIDIA's TensorRT-LLM and Modular on the per-step scheduling and kernel autotuning that real serving depends on. Composed stacks let a serving team swap one operation for a faster one without re-fusing the whole program.
Modern serving spreads a model across many GPUs using tensor parallelism, the technique that lets eight or sixteen devices cooperate on a single prompt by carving the model's weight matrices into slices. Even inside a fully fused forward pass, the nonlinear operations that AI models depend on, such as softmax, still have to communicate across devices between the matmul stages that produce them. Fusing the local code doesn't fuse the network. The hand-rolled megakernel buys less than its line count suggests.
That second fact is what makes the timing interesting. NVIDIA's announced Rubin generation targets the exact frictions the megakernel camp is trying to hand-optimize away. Rubin's headline spec, as excerpted in the Latent Space AINews piece, is 50 Petaflops of sparse NVFP4 compute, 288 GB of HBM4 with 22 TB/s of bandwidth, and NVLink 6 at 3.6 TB/s. The features that matter for this debate are smaller. Rubin doubles the K-dim width per matrix-multiply-accumulate iteration, halving the number of MMA iterations needed per layer. It ships a tile-level descriptor update for the tensor memory accelerator, so a single MoE descriptor is shared across all experts instead of one per expert. And it adds hardware-side kernel overlap that lets a downstream kernel start as soon as its tile's data is ready, instead of waiting for the whole previous kernel to finish.
Ali's framing in the same discussion: the original launch-overhead argument for megakernels was already weakened by NVIDIA's programmatic dependent launch (PDL), a software feature that lets a GPU schedule the next kernel based on data being produced by the current one. "Rubin fixes that" at the silicon level, Ali said, by giving the chip the same dependency-trigger ability in hardware.
The thesis the Latent Space discussion lands on is not that megakernels fail. They run. Cursor's repo runs. The thesis is that they are the wrong shape for the next two years of production inference, because the chips and the compiler stack are catching up to the fusion argument from below. The falsifier is concrete: if a major serving provider ships a hand-fused megakernel for production traffic in 2026, the production-versus-research frame collapses and the "so back" side wins.
Rubin is announced, not shipping. If it slips, or if vendors fall back to Blackwell, the hardware half of the argument softens. Watch the first Rubin benchmarks against TensorRT-LLM on a real serving workload, not a synthetic forward-pass.