The $400 Million Machine Deciding Whether Quantum Computing Scales

There's a $400 million machine in Belgium that may determine whether quantum computing scales, and fewer than a dozen exist worldwide.

Imec, the Belgian semiconductor research lab, announced this week that it built a functioning quantum-dot qubit using ASML's High NA EUV lithography machine. High NA EUV, or extreme ultraviolet lithography, is the same technique that prints the most advanced classical computer chips. The demonstration, shown at a conference rather than published in a peer-reviewed paper, is being called by imec the first integrated quantum hardware patterned at this resolution. What the announcement does not say: the device has no reported fidelity or coherence numbers. The performance benchmarks cited at 99.91% single-qubit control fidelity come from prior-generation devices built with older tools.

The ASML chokepoint is real. High NA EUV is the only lithography technique that can reliably pattern features below 10 nanometers at the precision quantum-dot arrays require. ASML has shipped fewer than a dozen High NA EUV tools globally. Intel secured early access to multiple High NA EUV tools, per Intel's public quantum research documentation. Imec is a rare exception: its machine represents one of fewer than a dozen such tools in existence, per Yahoo Finance reporting on imec's acquisition.

The technical claim behind the announcement is real, if thin. High NA EUV lithography can pattern gate gaps of 6 nanometers, per imec's press release, the feature size at which millions of qubits could theoretically integrate onto a single chip. The coupling strength between neighboring quantum dots increases exponentially as the gap shrinks, meaning smaller geometry enables denser, more interconnected qubit arrays. This is the semiconductor scaling playbook applied to quantum hardware. It works in principle.

What imec demonstrated is architecture. Whether that architecture produces a useful qubit is a separate question the announcement does not answer. Charge noise levels of 0.6 micro-eV per square-root hertz at 1Hz, the best demonstrated on a 300mm fab-compatible platform, come from a 2024 imec paper, not this week's demonstration. The conference demo shows the process works. It does not show the qubit works.

This is the pattern in quantum hardware announcements: architecture potential announced as capability, older results presented as current performance, and no independent verification of the key metrics. Imec is a serious research organization and its work will likely appear in a peer-reviewed paper with full data. When it does, the fidelity numbers will either justify the excitement or they will not. As of now, they have not been published.

The ASML angle is not new. ASML has been the only EUV supplier for years, and its grip on advanced lithography is well documented in quantum trade reporting. What the imec announcement adds is a concrete demonstration that the quantum scaling path runs through the same manufacturing chokepoint as classical chipmaking. You cannot separate the two supply chains anymore. China cannot access ASML's High NA EUV tools under current export controls. Most national quantum programs have no viable path to the manufacturing infrastructure this approach requires. The quantum race has become, in part, a question of fab access, and fab access runs through a single Dutch company.

Imec reported revenues of €1.2 billion in 2025, according to its press release. It has a machine. Intel has the others. Samsung and TSMC are waiting. IBM and Google have pursued superconducting and photonic qubit architectures that may sidestep the High NA EUV bottleneck entirely, though their long-term fab strategies remain unclear. PsiQuantum is betting on photonic error correction, a different technical bet that avoids silicon spin qubit manufacturing entirely. The queue for High NA EUV tools is not a quantum computing story. It is a semiconductor supply chain story, and the quantum computer is just the latest thing that needs one.