Sugon's Sugon 8000 stack in Zhengzhou pairs Hygon CPUs with a domestic low latency chip to chip fabric and liquid cooling, but 'fully domestic' still leans on x86 licensed cores and vendor supplied benchmarks.
A single Chinese supercomputer can now crunch double-precision fluid dynamics and train trillion-parameter language models on the same set of chips, according to Sugon, one of China's main high-performance computing vendors. The company says its new 100,000-card cluster in Zhengzhou, codenamed "Dengfeng" (登峰, "Peak") and branded as the Sugon 8000, is the first large-scale system built entirely from Chinese parts and wired into China's national supercomputing network. If the claim holds up under independent scrutiny, the system would let Chinese researchers and AI labs draw from one domestic pool instead of splitting scientific and AI workloads across separate machines, and would put China one step closer to running large-scale training without depending on US accelerators.
The deployment reached its full 100,000-card scale on July 10 at the 2026 Intelligent Computing Applications Conference in Zhengzhou, Sugon announced (Xinhua republished the same disclosure). The build timeline tracks roughly two and a half years: system design began in 2024, engineering wrapped in 2025, a 30,000-card slice went live in February 2026, a 60,000-card cluster dedicated to AI for Science workloads followed in April, and the full deployment came online in early July, according to a ScienceNet account. The Zhengzhou site sits on an East-Data-West-Compute backbone node, the national scheme that routes compute demand from coastal cities to inland energy-rich provinces.
The architectural pitch is what Sugon calls 原生超智融合 (native fusion of supercomputing and AI): the same physical stack handles FP64 double-precision scientific workloads and trillion-parameter model training, with support across the full precision range down to INT8, per the China.com.cn write-up. On paper, that avoids the throughput penalty researchers usually pay when scientific jobs are queued on a machine tuned for dense matrix math, and AI training then moves to a separate accelerator fabric. Sugon describes the stack as fully domestic: Hygon CPUs as the compute base, a scaleFabric-class RDMA network for chip-to-chip communication, ParaStor distributed storage for the data tier, and liquid cooling with a domestically sourced refrigerant, the vendor told 163.com. Sugon also says its ParaStor system took both production full-node and 10-node first places in the 2026 IO500 storage benchmark, a globally tracked ranking for HPC storage throughput.
The workload demonstrations are the part that travels furthest on a press release. Sugon says the cluster ran an 80,000-card protein folding simulation for drug discovery, an 88,000-card direct numerical simulation of turbulence at 328 trillion grid points, used in aerospace and ship design, and a 90,000-card density functional theory calculation of 3.16 trillion atoms, a heavy quantum-chemistry workload used in materials research. The company also reports more than 300 applications adapted and roughly 70 tests at the 10,000-card scale across materials, electromagnetics, quantum, biomedical, and weather domains. None of these numbers have been independently re-run outside a Sugon event. The protein-folding, turbulence, and DFT figures trace to a company-organized showcase; the underlying scientific papers or partner-institution validations behind them have not been published.
Every quoted throughput figure is a vendor claim, and 原生超智融合 is Sugon's own framing for what is, in essence, a converged HPC+AI architecture, a configuration Western labs are also building but with different silicon. Independent benchmarks from peer researchers or third-party testers would settle how much of the 100,000-card headline translates to usable training throughput, rather than peak FP64 theoretical performance.
Even on its own terms, "fully domestic" deserves a closer look. Hygon designs x86-compatible processors under an AMD technology license, and the company's manufacturing chain still leans on foreign foundries for the most advanced nodes. The networking fabric, storage, cooling, and rack-level integration are described as Chinese, and Sugon has built an open AI compute architecture that accepts third-party accelerators (163.com profile of the system). But the deepest layer of the stack, the instruction set and the silicon fabrication, still carries foreign design IP. Sugon's own Wikipedia background confirms it as a Shanghai-listed (603019.SH) high-performance computing vendor affiliated with the Chinese Academy of Sciences, with state ownership that is dispersed across multiple shareholders.
For peer comparison, the 100,000-card scale sits in the same neighborhood as xAI's Colossus, which started around 100,000 Nvidia H100s and has since expanded past 200,000, and well above a single Google TPU pod, typically 8,000 to 11,000 chips, with pods stitched together for larger jobs. Meta's combined H100 training fleet crossed 600,000 chips by late 2024. A Chinese stack at this scale is no longer a footnote, even if it does not yet match the largest US deployments in aggregate compute, and even if Sugon's 100,000 cards are split between training and simulation workloads rather than dedicated to one job.
Sugon's next move is already on the books: the company signed a deal at the same conference with the Beijing Institute of Scientific Intelligence to begin building a second 100,000-card system, with deployment scale and timing still undisclosed. If the first cluster begins attracting outside research groups through the National Supercomputing Internet, and if Sugon publishes peer-reviewed throughput numbers rather than vendor benchmarks, the unified-stack bet will get its real test.