West Lafayette gets SK Hynix's first U.S. advanced packaging campus, a $4 billion site that will stack the high bandwidth memory modules feeding AI accelerators, with production due in 2029.
A $4 billion SK hynix campus broke ground this week in West Lafayette, Indiana, on a 133-acre site inside the Purdue Research Park. The plant is not a chip fab. It is a packaging facility for high-bandwidth memory (HBM), the stacked memory modules that sit directly next to AI accelerators like NVIDIA's GPUs and feed them data at the bandwidth those chips need to train and run large models. It is also SK hynix's first manufacturing site on U.S. soil.
The United States is not, on this project, acquiring the ability to make the underlying memory. SK hynix will still fabricate the DRAM wafers in South Korea and ship them across the Pacific to Indiana, where workers will stack the individual dies vertically and wire them together using advanced interconnects. That stacked-die packaging step is the part of the HBM supply chain that has been the binding constraint, and it is the part this plant is being built to relieve.
HBM itself is a specialized form of memory designed for AI workloads. Standard DRAM chips lie flat on a circuit board and feed a processor through a limited number of connections. HBM chips are stacked (typically four, eight, or twelve DRAM dies piled on top of each other and connected through thousands of through-silicon vias) and then placed physically next to the AI accelerator on the same package or board. The geometry gives the accelerator far more memory bandwidth than it could get from conventional memory, which is the reason HBM has become the default for training and serving frontier models. The market is also unusually concentrated: SK hynix, Samsung, and Micron are effectively the only suppliers, and SK hynix is the volume leader.
The West Lafayette site is sized for that work. SK hynix's press materials describe an on-site Advanced Packaging R&D Testbed where customers, universities, and business partners can co-develop next-generation packaging and run prototype fabrication and performance validation. The campus is also the centerpiece of a research framework agreement SK hynix signed with Purdue University covering advanced-packaging collaboration and an engineering talent pipeline.
Federal backing is meaningful. The project has access to up to $458 million in direct CHIPS Act grants and $500 million in proposed federal loans, and the cost has grown from an initial roughly $3.9 billion estimate to more than $4 billion. At full ramp, SK hynix says the site will employ about 1,000 U.S. workers directly, with roughly 7,000 additional direct and indirect jobs across the regional economy. Senator Todd Young (R-IN), on the record at the ceremony, framed the project as proof Indiana is leading the rebuilding of America's semiconductor industry.
The schedule is concrete and tight. The cleanroom is scheduled to open by October 2028, with high-volume commercial production targeted for the second half of 2029. SK hynix says it is evaluating more than 100 supply partners for materials, components, and equipment for the Indiana site.
The framing this project deserves is narrow. It is a company-announced capacity bet: SK hynix is bringing the most constrained step of the HBM supply chain onto U.S. soil, but the underlying DRAM wafers still cross the Pacific from South Korea. What arrives in Indiana is the part of the chain that has been the bottleneck. What does not arrive is the part that makes the memory in the first place. The cleanroom opens in October 2028; the real test is whether high-volume production actually lands in the second half of 2029.