The $5 million SEALSQ Quobly deal embeds post quantum cryptography into the near absolute zero control electronics of silicon based quantum chips, a hardware layer standard hardening roadmaps skip.
SEALSQ and Quobly are placing post-quantum cryptography where standard migration plans do not reach: inside the cryogenic control electronics of silicon-spin quantum processors. The $5 million commercial agreement announced Thursday is the first to target post-quantum cryptography at the quantum stack itself rather than the classical endpoints most roadmaps defend.
The deal, distributed via GlobeNewswire, is the commercialization phase of a partnership first disclosed in November 2025 and follows SEALSQ's prior strategic investment in Quobly. The work covers roughly €4.4 million to integrate SEALSQ's hardware Root-of-Trust with Quobly's cryogenic complementary metal-oxide-semiconductor (CMOS) application-specific integrated circuits (ASICs), the chips that operate near absolute zero to control silicon-spin qubits. On top of that hardware layer, the partners will stack NIST-aligned post-quantum algorithms and a quantum-resistant public-key infrastructure (PKI) for the firmware, identity, and command chain of the quantum system.
This is a different threat model from the one driving most PQC migration. Classical PQC rollouts target servers, browsers, and TLS handshakes against a future cryptographically relevant quantum computer (CRQC) able to run Shor's algorithm against RSA and elliptic-curve keys. SEALSQ and Quobly are instead defending the quantum machine's own control plane, according to the joint release: firmware updates, calibration tables, and access credentials that flow through the cryogenic stack. A tampered calibration table or a forged firmware image could degrade a quantum processor's output without breaking any classical cryptographic boundary.
The deal extends a strategic relationship: SEALSQ, headquartered in Geneva, took a strategic stake in Quobly as part of an earlier collaboration first reported in 2025. Quobly then closed a €115 million Series A in June 2026 to industrialize its silicon-spin processors, with SEALSQ participating in the round. The $5 million agreement announced this week is the smallest of the three numbers and the most pointed: it converts a capital relationship into a paid engineering scope.
That scope also tracks the European quantum sovereignty argument. Quobly is building silicon-spin processors, a path that competes with superconducting and trapped-ion approaches dominated by U.S. rivals. Hardening those chips with European-sourced PQC and a Geneva-headquartered Root-of-Trust vendor lines up with the supply-chain position that drove the Series A: keep the full stack, from qubits to the cryptography that protects them, inside allied jurisdictions. Trade-press coverage from HPCwire, The Quantum Insider, and The Qubit Report has so far reformatted the wire release without adding independent reporting.
SEALSQ and Quobly have not published a delivery date for the integrated stack, the specific post-quantum primitives they will deploy, or the PKI architecture details. No independent researcher has validated whether securing control electronics is the right threat model, given that today's machines are not yet large enough to break classical public-key cryptography. The deal's commercial impact rests on company assertions; revenue will accrue only when Quobly ships processors bundling the hardened control plane.
Quobly targets commercial silicon-spin processors in the coming year; SEALSQ has begun sampling its hardware Root-of-Trust on related control chips. Whether rival silicon-spin programs ship comparable hardening on the same timeline will be visible in next year's quantum infrastructure roadmaps.