AINEWS
HBM4 is the stacked memory used inside AI training accelerators. Samsung's yield hit 80% this month, but its Korean packaging floors are full.
Samsung is weighing whether to move general-purpose DRAM and NAND packaging work out of its Cheonan and Onyang backend sites in South Korea and into Vietnam, according to a TechTimes report citing Korean industry outlet DealSite via Digitimes. Samsung has not publicly confirmed the plan.
The contingency is a physical-constraint problem, not a country decision. HBM4, the fourth generation of high-bandwidth memory and the stacked DRAM that sits next to GPUs in AI training accelerators, uses a fundamentally different backend process than conventional memory chips. Conventional DRAM and NAND packaging runs through roughly 700 process steps: die saw, wire bond or flip-chip, molding, electrical test. HBM stacking adds about 19 specialized steps on top: through-silicon via formation, wafer thinning to about 30 micrometers (0.0012 inches), precision die alignment, and thermal compression bonding of 12 to 16 thinned dies into a single tower.
The equipment that runs those 19 HBM steps cannot run the 700-step conventional flow, and the floor space is not interchangeable. Legacy DRAM and NAND product lines would have to leave the Korean floor for HBM4 to keep ramping at the rate Samsung wants.
The pressure on floor space is concrete. HBM4 yield at Samsung reached 80% earlier this month, ahead of the company's own year-end target. Samsung is pursuing a 47% increase in HBM wafer output, from roughly 170,000 wafers to about 250,000 per month by the end of 2026. The Cheonan site is already at full HBM stacking capacity across its C1, C2, and C3 lines, with no room to add more, a fact Samsung confirmed in a TrendForce-reported briefing earlier in 2026.
Onyang and Cheonan still have to run conventional DRAM and NAND packaging for the broader memory business while the HBM lines stay maxed out. The Vietnam move, if it happens, would take the legacy packaging load off the Korean floor and leave the backend clear for HBM4. The trade-off is sharp: legacy DRAM and NAND, the products that built Samsung's memory franchise, are being physically displaced to feed the AI accelerator category.
The plan is not confirmed. The report chain runs DealSite (Korean industry outlet) → Digitimes (Aug 14, 2026) → TechTimes (Aug 15, 2026), and Samsung has not commented. Counterparty or analyst reactions, and the economics of the Vietnam facility under consideration, are not in the available reporting. The cost of running DRAM and NAND packaging in a second country and the operational risk of splitting backend work across two sites will determine whether the move is approved, scaled back, or shelved.
The next data point is Cheonan floor utilization through the rest of 2026. If C1, C2, and C3 stay full and Samsung holds the 250,000-wafer goal, the case for relocating legacy packaging only gets stronger.