Copper interconnect is hitting its limit inside AI chip packages. Optical links are being pulled from the rack to the package itself, where Scintil and NcodiN show two stages of the same shift.
Photonics Is Sliding Inside the Chip: How AI's Next Bottleneck Moved Under the Lid
Copper interconnect is hitting its limit inside AI chip packages. Optical links are being pulled from the rack to the package itself, where Scintil and NcodiN show two stages of the same shift.
For the better part of a decade, optical networking lived at the front of the rack. Transceivers plugged into switch faceplates, sent light across the data hall, and stayed out of the way of the chips. That separation worked when a server's hottest link was a 100-gigabit Ethernet cable. It's breaking down now that an AI processor is no longer one die, but an assembly of GPUs, high-bandwidth memory stacks, and specialized accelerators called chiplets, all crammed into a single package and demanding terabits per second of interconnect between them.
Copper, the long-standing default for short, dense links, is running out of headroom at that density. "The interconnect domain is starting to switch to photons," said Eléonore Hardy, partnership manager at France's CEA-Leti research institute, in an EE Times feature on the architectural shift. The reason is mechanical, not aesthetic. As chiplets multiply and the spacing between them shrinks, electrical signaling at those distances loses both signal integrity and energy efficiency. Light, routed through waveguides etched into silicon, holds up.
The transition is not a single leap. It is a four-stage trajectory, and the industry is somewhere on the second or third step. Optical links have moved from front-panel transceivers to optical engines mounted inside the rack. The next stage puts the optics next to the switch or GPU die on the same package, an arrangement called co-packaged optics. The stage after that pulls the optical layer still further inward, into a photonic interposer: a routing plane made of waveguides that carries data between chiplets inside a 3D-stacked package.
Two companies, Scintil Photonics and NcodiN, are working on adjacent steps in the same inward move.
Scintil Photonics sits on the outside-the-package side. Its LEAF Light product is an integrated photonic laser source that combines several wavelengths of light into a single output, a technique called dense wavelength division multiplexing (DWDM), and feeds them to a co-packaged optical engine nearby. In practice, multiple parallel wavelengths let each lane run at a more moderate signaling rate while still multiplying the total bandwidth, which is what makes the approach attractive as AI scale-out keeps pushing per-link demand. Scintil integrates the distributed-feedback lasers, the multiplexing stages that combine the wavelengths, four optical output ports, monitoring photodiodes, and an on-die frequency reference that keeps the wavelengths locked to the customer's grid, all on one die. The light itself comes from a separate, standardized pluggable module called an ELSFP (External Laser Small Form-Factor Pluggable) that lives at the front of the rack. "We are industrializing LEAF Light," Yannick Paillard, Scintil's chief commercial officer, told EE Times.
NcodiN is taking the other route. The younger French company is working on nanolasers, semiconductor emitters small enough to place directly on a photonic layer inside the chip package, alongside the chiplets they need to talk to. Where Scintil pushes light in from the front of the rack, NcodiN is trying to make the laser itself part of the package. The bet is that a photonic interposer populated with on-chip light sources can route data between chiplets without the energy and signal-integrity penalty of running electrical signals at chiplet-to-chiplet distances inside a 3D stack.
The two companies are not competitors in the usual sense. They are two positions on the same trajectory, and the pair shows where the next constraint has shifted: from how many transistors fit on a die, to how much data can move between chiplets inside a single package. Scintil is the near-term path, a practical DWDM source for the co-packaged optical engines expected to ship into the next generation of AI switches and accelerators. NcodiN is the long-term path, a photonic interposer that, if it works at production scale, changes the substrate on which AI accelerators are designed.
For most of the chip industry's history, the binding constraint was transistor density, how many switches fit on a piece of silicon. Today the binding constraint is interconnect density inside the package. As chiplets and memory stacks pile up and the spacing between them shrinks, the same question keeps coming up: how do you move enough data between the pieces without burning the power budget? Photonics is the architectural answer being assembled in real time.
No production AI accelerator ships a photonic interposer yet. Scintil's LEAF Light is the part of the inward move closest to deployment. NcodiN's nanolasers are still a research-stage bet, anchored in the company's own positioning. What the trend does establish is where the next constraint frontier sits: the package, not the die.