India has five chip assembly and packaging plants in commercial production, and the next bottleneck is the test floor: per device test times of seconds to minutes decide whether announced output is real.
India has five chip-assembly and packaging plants in commercial production. The next constraint on whether they hit their announced output is not a new policy or a new fab. It is the test floor, and the math is a function of seconds per device.
The test step is the gate every packaged chip passes through before it ships. A device that tests in under a minute and one that takes five to ten minutes require very different equipment counts to hit the same annual production number, Karthik Balasekar of NI India/Emerson told EE Times. That single variable, the seconds each chip sits on the tester, turns "15 million chips a year" from a fixed number into a moving one. For India's new back-end plants, it is also the variable that determines how many testers they actually need to order, install, and qualify before production targets become real.
India's five plants in commercial production are all back-end units, not wafer fabs — assembly, test, marking and packaging lines, EE Times reported from SEMICON India 2026. The set spans OSAT plants, which take finished wafers, cut and package the chips, then run electrical and functional tests, among them Kaynes Semicon and CG Semi, alongside packaging and discrete-device lines including Micron's ATMP facility in Sanand, where commercial DRAM and NAND production is underway, CDIL Semiconductor's unit in Mohali, and Suchi Semicon's in Surat. India's first commercial fab, Tata Electronics' 300-mm site in Dholera, is still under construction, EE Times reports. The bottleneck, per EE Times' reporting on the Indian buildout, has shifted from packaging to testing.
SEMI's mid-year 2026 forecast projects global semiconductor test equipment sales growing 31% to $15.3 billion in 2026, on top of 55.3% growth in 2025, and reaching $20.8 billion by 2028. The same forecast puts assembly and packaging equipment, up 20.8% in 2025, at 9.6% growth to $6.7 billion in 2026. A separate SEMI release covering the second quarter of 2026 reports global equipment billings up 23% year over year to $40.53 billion, a second consecutive record quarter. These are the background numbers. The India-specific question is which of those dollars land at which Indian test floor, on which platform, and on what timeline.
Indian OSATs face a split problem. Some operators are modernizing legacy testers brought in from older product lines; others are designing test architectures from scratch for new chips, EE Times reports. The two paths imply very different procurement and qualification calendars. Tester qualification generally takes six months to a year before a final purchasing decision, Ved Mahanta of NI India/Emerson told EE Times. A tester order placed in late 2025 is unlikely to be running production volume before mid-2026 or later, and a greenfield test architecture designed in 2026 does not start hitting yield curves until 2027.
The one named customer-vendor pairing in the public record so far is the September 2025 announcement that Emerson would deploy its NI Semiconductor Test System (STS) as the primary test platform across Kaynes Semicon's OSAT facility in Sanand, Gujarat, EE Times reports. Balasekar described STS as "a platform that supports both mixed-signal and RF applications," one Kaynes can reuse for different devices under test. The deal gives a concrete answer to the abstract question of what an Indian OSAT test floor looks like. It also raises a question: how much of the remaining Indian test capacity gets built on the same STS platform, and how much spreads across other vendors? EE Times reports that other Indian OSATs are still qualifying test equipment and that some engagements are not publicly disclosed. The vendor-concentration picture is therefore incomplete, and the disclosure gap is itself a signal of how early this market still is.
What the next eighteen months actually look like depends on a short list of engineering and buying decisions. Test architecture choices between legacy modernization and greenfield design. Procurement sequencing for testers that take six months to a year to qualify. Platform standardization, or its absence, across India's new back-end plants. The government is putting $13.5 billion into the second phase of the India Semiconductor Mission, with advanced packaging and testing units among its six focus areas, per India's electronics and IT minister at SEMICON India 2026. These are identifiable problems with identifiable decision-makers, not a verdict on whether India's chip build will succeed. The packaging plants are real and the test equipment market is growing. The question that decides whether the announced output numbers hold up is whether the test floor catches up in time.