IBM and Arm co-design a 2nm mainframe chip that runs both Arm and IBM Z code natively

IBM and Arm are co-designing a 2nm processor for future IBM Z and LinuxONE servers in which every core natively runs both IBM Z and Arm instructions on the same silicon, with no separate Arm cores or translation layer.

Announced at Hot Chips on Aug. 24, the chip carries 11 high-performance cores above 5.7 GHz, on-chip AI inference accelerators for in-transaction fraud detection, and a dedicated on-chip data processing unit for I/O. It is the first silicon milestone from the IBM–Arm collaboration established in April 2026.

Today, IBM Z and LinuxONE mainframes run only IBM's instruction set; workloads that need Arm typically require separate hardware or a translation layer. Putting both on every core lets an Arm-native workload sit on the same core as the transaction it scores, alongside the cache and security features mainframes carry.

"This new dual-architecture processor, developed in collaboration with Arm, is designed to bring unmatched performance and AI capabilities to IBM Z and LinuxONE," said Christian Jacobi, IBM Systems Development. Mohamed Awad, EVP Cloud AI at Arm, pointed to the Arm ecosystem's 22 million developers, a reach IBM Z has not had on its own.

The press materials name no ship date, no customer commitments, and no third-party benchmarks. The source verb is "designing," not "shipping," and both quoted executives work for the two companies behind the design.