AIBRIEF
US export controls target a stack, not a single chip. Beijing's substitutions are advancing one layer at a time.
The US restrictions on China's access to advanced AI chips are not a single wall. They are a stack of them, and the Chinese response is layer-by-layer substitution rather than a single breakthrough.
The stack starts with chip design software (the EDA, or electronic design automation, tools from Cadence, Synopsys, and Siemens, restricted for Chinese customers) and the lithography machines that print circuit patterns (ASML's EUV systems are barred; older DUV machines still flow with limits). Above that sit high-bandwidth memory, the HBM chips from Samsung, SK Hynix, and Micron that feed data to AI accelerators, also under pressure. Next come the advanced-node fabs: TSMC and Samsung make 7nm and below, while SMIC races to stand up domestic capacity. At the top sit the AI accelerators themselves, with Nvidia's top SKUs restricted and weaker variants still shipping.
When a headline claims China is 'catching up' or the US is 'tightening,' it usually points at one of these layers. A new domestic lithography tool is a lithography story. An HBM licensing change is a memory story. A Huawei or Cambricon chip is an accelerator story. Each layer moves on a different clock, and each substitution reshapes the bottleneck.
What remains unknown is which layer crosses the threshold for frontier model training first.
Source: [The Eastern Window: China chips away at America's AI chokehold]