QCBRIEF
D Wave is running a beta of a 21 qubit gate model quantum simulator — the digital circuit style of quantum computer, distinct from D Wave's annealing systems — that models an error locating qubit design in which losing one of two signal paths is
D-Wave opened a beta of a 21-qubit gate-model quantum simulator on October 1, 2026, putting a software model of its next-generation hardware into outside hands for the first time. It is meant to let beta testers write code against a chip architecture that does not yet exist as silicon.
The architecture in question is dual-rail: a qubit design where a photon loss shows up at a known point in space and time, instead of as a hidden error. That property is the bet. If the hardware can locate an error at all, that is the precondition for running useful error-corrected machines with fewer physical qubits per logical one. The two-qubit gate result behind the design was published in Nature earlier this year; the news here is the software tool, not new physics.
D-Wave named four outside testers: BBVA, the global bank; FirstQFM, a financial-services software firm; Florida Atlantic University; and the Jülich Supercomputing Centre, a German national facility. The simulator runs through D-Wave's Leap cloud platform and Ocean software development kit.
The company frames the beta as preparation for forthcoming gate-model systems, with general availability, pricing, and any measurement of how closely the simulator tracks future hardware still unspecified in the reviewed materials. The 21-qubit ceiling is the honest limit a skeptical reader will want named: this is a software sandbox for a future chip, not a working quantum computer.