CXMT's G5 DRAM lands in smartphones first

CXMT used the 2026 World Manufacturing Convention in Hefei on Sept. 20 to put its fifth-generation DRAM platform, branded G5, into mass production. The node number, an 11.95-nanometer active-area half-pitch made with quadruple patterning, is the headline. The product choice shapes the announcement.

The first G5 devices are two 24-gigabit LPDDR5X chips, in 496-ball and 245-ball packages, already in mass production and aimed at smartphones and portable consumer electronics. CXMT's own release pairs the platform with a 45:1 capacitor aspect ratio, a 6,762-nanometer core cell array height, and a stated gain of at least 50% more dies per wafer than the prior generation. Those are company-reported figures, not independent teardowns.

TechNode carried the same numbers; BusinessKorea and SCMP corroborated the announcement. The underlying release is on CXMT's newsroom.

The LPDDR5X-first mix shows where the platform will pressure incumbents first. Smartphone DRAM rewards density and power efficiency, not the raw bandwidth that server DDR5 does. If CXMT ships G5 into phones at volume, the competition lands in the LPDDR5X market, where Samsung, SK hynix, and Micron have been the entrenched suppliers. Whether the ramp reaches the claimed volume and yield, and whether server DDR5 follows on the same node, remain open. The node figure is settled; the product roadmap behind it is not.