Lithography is the hardest step in chipmaking. A reported Chinese tool marks progress, but Korean experts say initial yields must climb from 10–20% to roughly 90% for profitable production.
China has reportedly built its own immersion DUV lithography machine. The chips it prints still come out wrong 80 to 90 percent of the time. Yield is the binding constraint.
Korea's industry minister publicly called the advance "shocking and faster than expected" on Thursday, according to a Korea Herald report relayed by ANI. Lithography is the step that prints circuit patterns onto silicon wafers, and it is widely considered the most difficult of the roughly 800 steps involved in chipmaking. The dominant supplier of advanced systems is ASML, a Dutch company whose immersion DUV tools print chips at 7-nanometer and smaller process nodes.
US export controls have kept those systems out of China. Blocked from buying advanced immersion DUV, Chinese chipmakers have relied on older dry DUV equipment used mainly for 20- to 28-nanometer chips. Chinese firms reportedly pushed the older tools into 7-nanometer-class production through multipatterning, the technique of running wafers through the machine multiple times to draw finer features, but yields and production economics remained unclear. The gap between 28-nanometer and 7-nanometer-class chips is the one that matters for advanced processors and AI accelerators. A Chinese-built immersion DUV tool, if it works as described, would let fabs draw those features without the productivity penalty that multipatterning imposes.
Shim Dae-yong, an electrical engineering professor at Dong-A University and a former SK hynix vice president specializing in high-bandwidth memory, named the binding constraint. Initial yields on China's new system could remain at 10 to 20 percent, he said, while profitable mass production generally demands levels closer to 90 percent. "Even SK hynix needed two to three years to tune its processes and achieve meaningful yields after adopting ASML's ArF immersion DUV equipment," Shim added. Determining whether China's reported system is suitable for stable mass production could take at least two to three years, per the same expert.
Yield is the share of chips on a wafer that come out functional; the rest are discarded. A line that prints 15 percent good chips is not a line. It is a money-losing demonstration.
Korea's Industry Minister Kim Jung-kwan said Thursday that the development fits a longer Chinese pattern. "China is advancing step by step in semiconductors despite the limited profitability of many Chinese chipmakers backed by massive state support," he said.
Kim Hyung-jun, an emeritus professor at Seoul National University who heads the state-led Next Generation Intelligence Semiconductor effort, made a separate point. "Having the machine does not mean the work is finished," he said, pointing to the years of process tuning that turn a working prototype into a fab line.
There is no independent confirmation of the tool's capabilities from any Chinese equipment maker, fab, or official Chinese government source in the public reporting. The yield figure is an expert estimate, not a measured result. The hardware could match the description or fall short of it; the binding constraint is the same either way.
What "catching up" actually looks like is a yield curve. SK hynix, the most relevant benchmark, took two to three years to tune ASML's ArF immersion DUV to commercially viable yields. If China's new system follows a similar curve, meaningful production would arrive no earlier than 2028, and that assumes the equipment itself performs as the reporting describes. Until then, the gap between a working machine and a profitable line is roughly the difference between 15 percent and 90 percent. The next milestone is a published yield number from a working Chinese fab line.