Cat qubits are a quantum bit design that resists certain errors by encoding information in a superconducting oscillator; the memorandum of understanding (MoU) is non binding, with no timeline, benchmarks, or user access model yet disclosed.
European supercomputing centers are one engineering step closer to running quantum jobs the same way they already run CPU jobs: alongside them, in the same scheduling queue, without a separate allocation. The mechanism behind that step is a June 24 memorandum of understanding between Bull, the French high-performance computing vendor, and Alice & Bob, the Paris-based quantum hardware startup whose machines use "cat qubits," a quantum bit design that resists certain errors by encoding information in a superconducting oscillator rather than in a conventional two-level circuit. The companies announced the deal jointly on the newswire and three independent trade outlets picked up the same-day story, including The Qubit Report.
What makes a cat qubit worth integrating is its error profile. Cat qubits encode a qubit in the quantum state of a microwave-frequency oscillator, a bosonic mode rather than a discrete two-level system, and the encoding gives them a strong, intrinsic bias against bit-flip errors while phase-flip errors dominate. That asymmetry matters because the dominant error-correction scheme Alice & Bob and most other groups pursuing fault-tolerant quantum computing use, the surface code, is much more efficient when one error type dominates. The architecture's case is laid out in recent arXiv preprints on biased-noise distillation and resource-efficient quantum memory and in a March APS Global Physics Summit program of 12 talks from Alice & Bob covering stabilization, error protection, magic-state preparation, and what the company describes as ultra-low logical error rate validation. The pitch is straightforward: a fault-tolerant machine needs fewer physical qubits to protect one logical qubit than a transmon-based architecture, where a transmon is the superconducting two-level circuit used by most of today's quantum hardware roadmaps.
The mechanism the MoU actually targets is plumbing, not physics. Bull, which supplies HPC systems and integration to European research centers and enterprises, would treat Alice & Bob's processors as a schedulable resource inside the same SLURM-based job scheduler that today hands CPU and GPU slots to scientific workloads. SLURM is the open-source workload manager that decides which job runs next on which supercomputer node; if a cat-qubit processor becomes a "schedulable resource" inside it, a researcher could, in principle, submit a quantum job to the same supercomputer queue that already handles their CPU runs, instead of requesting a separate quantum-specific allocation. The deal covers joint research, product development, and commercialization across European HPC infrastructure according to coverage consistent with the official press release.
That is what would actually change for a European HPC user if the integration works. Today, accessing fault-tolerant quantum hardware typically means applying to a separate program, queueing through a vendor portal, and stitching result files back into a classical workflow by hand. A SLURM-integrated cat-qubit resource would let a researcher submit a hybrid job from a familiar supercomputing environment, with the scheduler deciding whether the quantum leg runs on Alice & Bob's hardware or waits for a slot. The job would arrive as one work unit rather than two, and the access path would look like another node on a familiar machine. None of that is what a researcher can do today.
What it is not, yet, is productized. The MoU is non-binding: no announced ship date, no disclosed error rates, no benchmarks, no pricing, no access model, and no pilot site. Independent trade coverage from The Quantum Insider and The Qubit Report repeats the language of the press release without adding independent benchmarks or independent user commitments. "Fault-tolerant" at the scale this MoU implies, running jobs researchers would actually want to run, is still aspirational; the company has demonstrated stabilization and error-protection techniques at small scale, not a full fault-tolerant machine, and the announcement comes from the two parties with the strongest marketing incentive to frame a research collaboration as an infrastructure milestone. Broader quantum hardware tracking places this against competing roadmaps that have not adopted the cat-qubit path.
The watch items are concrete. First, whether Bull names a pilot European HPC site and a timeline for the SLURM integration, since that turns the MoU from a press release into a procurement path. Second, whether Alice & Bob publishes benchmark numbers for a logical qubit: logical error rate, code distance, and number of physical qubits per logical, that an HPC user could compare against transmon- and ion-trap-based competitors. Third, whether any European national supercomputing center signs on as an access point, which would convert the partnership from a vendor-to-vendor arrangement into a user-visible resource.