Anderon finalizes $1B federal CHIPS award to build a 300mm quantum-chip foundry in New York

Anderon, an IBM subsidiary at the Albany NanoTech Complex in New York, finalized a $1 billion CHIPS and Science Act award with the U.S. Department of Commerce on September 16, and IBM is putting another $1 billion of its own capital behind the same 300mm line. The $2 billion funds what the parties are calling a pure-play quantum foundry: a 300mm wafer line designed from the ground up for qubits, not a logic fab with a quantum corner bolted on.

The category did not exist 18 months ago. Calling the Anderon line a foundry rather than a research fab changes the bottleneck: the work between today's small-scale quantum demos and a useful machine is now a manufacturing engineering problem, not a physics problem. First wafers are already moving on the line, running superconducting qubit arrays, quantum I/O, and readout chains. The site plan is built to absorb additional quantum modalities beyond superconducting, and that is the part that justifies the foundry label. A line that can only run one qubit architecture is a pilot. A line that can be retooled for the next one is a factory.

Mukesh Khare, the general manager of IBM Quantum, and Jay Gambetta, IBM's director of research, both framed the award as a step into manufacturing scale and as the fabrication capacity IBM's quantum roadmap has been waiting on. The framings, as carried by the industry's daily quantum coverage, point to the same shift: the limiting factor in quantum hardware is moving from physics to production engineering.

The scale of the change is clearer when set against the other 300mm moves in the same week, even though the primary source receipts for those are thinner. In Crolles, France, Quobly demonstrated readout, single-qubit gates, and two-qubit gates on a single QSOI chip, a silicon-spin device built on STMicroelectronics' commercial 300mm FD-SOI logic line. FD-SOI is a chip-manufacturing process that adds a thin insulating layer to reduce power leakage, and QSOI is Quobly's spin-qubit variant of it. Quobly's own framing is that those three operations are what the field owed a 1998 spin-qubit paper, and that wafer-after-wafer copy is now the job. The Crolles line is not a foundry. It is a proof that 300mm silicon-spin qubits can run the same gate set as research devices, on a logic fab's own equipment.

In Dresden, Fraunhofer IPMS installed a flexible PVD tool, a physical-vapor-deposition system for laying down thin films, in a 300mm cleanroom and reported niobium-nitride and zirconium-nitride films with superconducting properties that match published benchmarks. The tool is aimed at three follow-on programs called APECS, SUPREME, and SPINS. A flexible PVD tool is a process platform, not a fab, but it is the kind of shared equipment a future quantum foundry could rent time on.

In Barcelona, Spain's CSIC opened a Quantum Nanofabrication Area inside IMB-CNM with more than €6 million, roughly $6.5 million at recent exchange rates, of electron-beam lithography and nanoscale metrology, funded through the country's PERTE Chip program and the European Union's Next Generation EU recovery instrument. €6M of lithography is real nanofabrication capacity. It is not a foundry either. It is what a regional research lab looks like once the public money has landed and the equipment has been installed.

What the Anderon line has to do is harder than any of those adjacent moves. A pure-play quantum foundry is not a generic chip line. The processes for superconducting qubits, silicon spin qubits, and the cryogenic I/O that connects them do not share a single recipe. A modality-agnostic site plan is a bet that the industry will converge on common front-end processes even as the qubit architectures diverge, and that the bottleneck will sit in back-end packaging and control electronics rather than in the qubit layer itself. The first wafers are already running, but a foundry that has to absorb a new qubit modality every two to three years is a different engineering problem from a logic fab that runs the same transistor for a decade.

The other open question is fault tolerance. A useful quantum machine needs error correction, and Riverlane and Qblox reported closing a full real-time quantum error-correction loop: syndrome extraction, the step that detects errors without destroying the quantum state, followed by a conditional correction pulse, all on a single chip. One closed loop is not a fault-tolerant system. A fault-tolerant system needs many such loops running in parallel at a useful code distance, the number of physical qubits used to encode a single logical qubit, and a fab that can produce the control hardware at scale. That is the work the Anderon line is supposed to enable.

The $2 billion at Albany does not finish it. It puts the work on a production substrate, in a building that can be retooled, with a public capital stack the U.S. government has decided to back. The next milestones to watch are the first non-superconducting wafer run on the Anderon line and the first fault-tolerant benchmark published on a device made there.