AI Chips Got Easy. Memory Didn't.
High bandwidth memory, the specialized DRAM stacked next to AI processors, is still made by only three companies after fifteen years of consolidation, and that is the constraint deciding who gets to build at scale.
High bandwidth memory, the specialized DRAM stacked next to AI processors, is still made by only three companies after fifteen years of consolidation, and that is the constraint deciding who gets to build at scale.
The AI chip race has a hidden wall, and it is made of memory. NVIDIA gets the headlines, custom AI accelerators from Google, Amazon, Microsoft, and Meta get the next wave of coverage, and a long tail of well-funded startups competes for the rest. Underneath all of that activity, the same three companies are quietly deciding who actually gets to build at scale: Samsung, SK hynix, and Micron.
The reason is a specific kind of memory called HBM, short for high-bandwidth memory. It is not the working memory in a laptop. It is specialized DRAM that is stacked vertically and wired directly into the same package as an AI processor, so the chip can feed on data fast enough to train and run large models. Every modern AI accelerator, from NVIDIA's GPUs to Google's TPU, Amazon's Trainium, Microsoft's Maia, and Meta's MTIA, depends on it.
The strategic fact is that nobody outside Samsung, SK hynix, and Micron can make HBM at scale. The SemiVision analyst note frames it bluntly: after fifteen years of consolidation, advanced DRAM is a closed three-firm oligopoly, and HBM is its most concentrated corner.
How the door closed
The current structure is the residue of two acquisitions in the early 2010s. SK Telecom bought Hynix in 2012, and Micron bought Japan's Elpida in 2013. An Introl timeline of the memory market walks through how those deals, plus exits by Qimonda, Elpida's older fabs, and Rexchip, took the number of meaningful DRAM makers from roughly ten to three inside five years. Nomad Semi's memory primer covers the same consolidation wave. The next consolidation layer is NAND flash, where five firms have effectively merged into two. But DRAM is the more strategically loaded half of the memory market, because every AI accelerator needs it.
Why AI chips are easier than HBM
Designing an AI chip is, by 2026, a relatively solved problem. A startup can license an instruction set from Arm, write the chip in standard electronic-design-automation tools, and ship the design to TSMC, which manufactures it on the most advanced process nodes on the planet. This "fabless" model is what lets dozens of AI accelerator companies exist at once.
HBM cannot be made that way. SemiVision's analysis makes the structural point: HBM requires EUV-class lithography (the most advanced ultraviolet patterning used to etch the smallest features on a chip), deep process know-how, advanced packaging that uses through-silicon vias (vertical electrical connections drilled through a silicon die) and precision mass reflow, and capital spending measured in tens of billions of dollars per generation. Those four ingredients only exist inside Samsung, SK hynix, and Micron. No foundry will build HBM for a customer the way TSMC builds AI logic chips, because the recipes are not separable from the fabs.
That asymmetry, fabless design everywhere in logic and captive manufacturing everywhere in HBM, is the real reason the AI buildout is memory-constrained and not chip-constrained.
The 2026 numbers, with the right caveats
How concentrated is concentrated? Silicon Analysts' June 2026 HBM tracker puts SK hynix at roughly half of HBM revenue, with Samsung and Micron splitting most of the rest. Astute Group's coverage of Chosun Biz puts SK hynix's HBM share at 62% in some 2026 readings and shows Micron overtaking Samsung in the most recent quarter. Data Center Dynamics and Counterpoint Research both describe a market where all three suppliers' 2026 HBM output is essentially sold out, with NVIDIA, AMD, and Google's TPU program as anchor customers, and Momoview's May 2026 three-way war piece calls 2026 HBM capacity fully committed.
The range is wide because the firms measure differently and the quarters disagree. Treat any single-digit percentage point as a snapshot, not a verdict.
Pricing tells the same story from a different angle. TrendForce reported in December 2025 that Samsung and SK hynix were pushing HBM3E prices (HBM3E is the current generation of the stacked-memory standard) up roughly 20% for 2026 as lines retooled for HBM4, and Silicon Analysts' June 2026 spot estimates put a finished HBM3E stack near $300 and an HBM4 stack near $500, versus roughly $200 for an HBM3 stack. These are analyst tracker numbers, not transactional disclosures, and the spread between contract and spot can be wide, but the direction is unambiguous: tighter, not looser.
The custom-silicon escape hatch is not an escape hatch
The natural counter-narrative is that hyperscalers will escape NVIDIA by designing their own AI chips. Tom's Hardware's May 2026 survey of custom AI accelerators and Spheron's hyperscaler silicon overview lay out the field: Google's TPU Ironwood, AWS Trainium 3, Microsoft Maia 200, Meta MTIA. Broadcom does the silicon for Google, Meta, and OpenAI's Titan; Marvell does it for Trainium and Maia.
The escape hatch runs straight into the same wall. Every one of those custom chips still needs HBM, and the HBM comes from the same three suppliers. Custom silicon changes who designs the chip. It does not change who builds the memory. As Investing.com's February 2026 structural-shift piece frames it, 2026 is when AI-era expectations of ever-cheaper memory give way to a structural premium tied to capacity scarcity.
What to watch
Three concrete things will tell you whether this bottleneck eases or hardens. First, whether Samsung clears HBM3E qualification at NVIDIA-grade yield; EnkiAI's April 2026 supply-crisis piece and Astute Group both flag Samsung as still trailing on HBM3E, which is the main reason a third supplier has not loosened pricing. Second, whether HBM4 ramps on the schedule the SK hynix 2026 outlook describes, because every quarter of slip keeps the constraint intact. Third, whether any new entrant, a Chinese memory maker under export-control pressure, an Intel foundry memory bet, a packaging-led challenger, produces a credible 2027 HBM roadmap. SemiVision's framing is the right null hypothesis: until one of those bets produces volume, the AI industry's build ceiling is set by Samsung, SK hynix, and Micron, not by any design studio.