QCBRIEF
An arXiv preprint traces how a shared control chain can corrupt a superconducting quantum chip, surfacing clipping, crosstalk, and leakage in simulation before fabrication.
A multi-qubit superconducting chip routes many radio-frequency control signals through one shared electronic chain, and any one of those signals can corrupt a calculation. A new arXiv preprint, RF-Budgeted Frame Compilation for Frequency-Multiplexed Superconducting-Qubit Control, models that shared chain as a budget to be planned against, not a fidelity to be measured, letting engineers catch interference problems in software before any chip is fabricated.
The workflow stitches together three pieces: a per-qubit settings file the authors call a QID (qubit-control identity) record, a MATLAB/Simulink model of the shared RFSoC (radio-frequency system-on-chip) hardware that generates and reads the control signals, and a QuTiP qutrit-level simulator that tracks each pulse's effect on each qubit's intended and leakage levels. Candidate multitone frames, time slots where several qubits are driven on different radio frequencies at once, are scheduled against an explicit budget that names nine failure modes: finite bandwidth, crest factor, clipping, quantization, jitter, spurs, compression, crosstalk, and leakage.
Under the nominal RF budget, a 12-qubit Bernstein-Vazirani -Y90 layer, a Qiskit-derived test workload, closes in three validated four-tone frames at 240 nanoseconds. The paper also reports that longer pulses aggregate more work per frame without necessarily minimizing the time-normalized layer cost, and that clustered frequency maps and multitone leakage stacking tighten closure.
Every number in the paper is a model-based, decoherence-free simulation diagnostic. There is no measured hardware fidelity and no wiring-reduction claim. The contribution is a pre-hardware design check that sits alongside existing RFSoC control tools like Qibosoq and QICK.